发明名称 Input circuit receiving input signal of TTL level
摘要 A signal input circuit having a CMOS inverter for receiving an input signal of a TTL level is disclosed. This circuit includes a first transistor of one channel type connected between a first power terminal and an output terminal and having a gate connected to an input terminal, a second transistor of an opposite channel type connected between a second power terminal and the output terminal and having a gate connected to the input terminal, and a current gain control circuit coupled to the first transistor for controlling the current gain of the first transistor to a first value when a power voltage is at a first level and to a second value when the power voltage is at a second level.
申请公布号 US5438280(A) 申请公布日期 1995.08.01
申请号 US19930159512 申请日期 1993.11.30
申请人 NEC CORPORATION 发明人 SUGAWARA, MITSUTOSHI
分类号 H03K19/00;H03K19/0185;(IPC1-7):H03K19/017 主分类号 H03K19/00
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