| 摘要 |
PURPOSE:To simplify the clock signal and to establish the sense amplifier of high sensitivity, by providing two sets of the circuits in series connection of two MOSFET'S, giving the precharge potential of the same potential to the junction of series connection, and constituting FF circuit. CONSTITUTION:The same potential is given to the junctions NDa and NDb and MOSFETQ13,Q14 are cut off and are made to precharge condition. The charge at the memory cell MC and dummy cell DC is caused with decoding, and if fine potential difference is caused on the bit lines BLa and BLb, MOSFETQ13 is turned on and the potential on the junction NDb is higher than NDa, turning off MOSFETQ14. When the clock signal CK is low in potential and FF circuit of MOSFERQ 11 and Q12 is activated, the bit line BLa is more lower in potential and BLb is kept at a high potential, and the signal read out from the memory cell is amplified. The sensitivity of the sense amplifier is increased by first making slower the decreasing speed for the clock signal and quicken later it. |
