| 摘要 |
<p>PURPOSE:To provide a clock phase selection circuit which realizes phase control to a high-speed clock signal by a low frequency oscillator. CONSTITUTION:By operating a phase control signal 109 corresponding to an output clock signal 110, the phase change amount of the output clock signal 110 and according to the signal 109, an up-down counter 107 increases or decreases its counter value and outputs it to a data bus as phase information 106. The phase information 106 is inputted to a sine wave converter circuit 101, converted to a value 104 of sinpsi and outputted. On the other hand, the phase information 106 is inputted to a cosine wave converter circuit 103, converted to a value 105 of cospsi and outputted. A signal at the same frequency as a desired clock signal is outputted from an oscillator 100, inputted to an orthogonal modulator circuit 102 and outputted after performing phase control and noise removal.</p> |
