NAPNOP CIRCUIT FOR SAVING OF ELECTRIC POWER IN COMPUTER SYSTEM

摘要

PURPOSE: To provide a circuit which generates and executes a NAPNOP function to decrease whole power consumption and heat release in a system. CONSTITUTION: This system has a delay circuit which consists of plural flip-flops 40 to 60 that block the output of N-fold time variable length period system clock pulse of a clock pulse, a means 70 connected to the delay circuit 60 which inputs a 1st signal starting a NAP period that blocks the output of the system clock pulse from the delay circuit to a microprocessor base system and a clock input means 10 which is connected to the delay circuit 60. Furthermore, the system has a gate means 20 connected to the delay circuit 60 which supplies the delay circuit with a 2nd signal to end the NAP period by making it possible that a clock pulse signal is outputted from the delay circuit 60 to the microprocessor base system.