VARIABLE CHIP CLOCK DEVICE

摘要

PURPOSE: To improve a chip speed performance by clocking several circuits in a chip which is not in an idle state at a high clock frequency when heat saving is saved. CONSTITUTION: An activity monitor 18 detects an idle state in circuits in a chip 16. An heat saving accumulator 10 responds to a clock speed of the circuits in the chip 16 by a counter 12 and estimates the difference between heat release amount which is saved as a result of clocking the circuits in the chip 16 at a low clock frequency and one that is saved as a result of clocking the circuits in the chip 16 at a high clock frequency. Then, the counter 12 responds to the accumulator 12 and the monitor 18 and clocks several circuits in the chip 16 which is not in an idle state at a high clock frequency when the heat saving is stored. Hereby, a speed performance of the chip 16 can be improved.