DELAY OPTIMIZATION SYSTEM FOR SEQUENCIAL CIRCUIT,申请号JP19930345992-传众专利搜索

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发明名称	DELAY OPTIMIZATION SYSTEM FOR SEQUENCIAL CIRCUIT
摘要
申请公布号	JPH07182394(A)	申请公布日期	1995.07.21
申请号	JP19930345992	申请日期	1993.12.24
申请人	NEC CORP	发明人	SHINOHARA NAOKO
分类号	G06F17/50;(IPC1-7):G06F17/50	主分类号	G06F17/50
代理机构		代理人
主权项
地址

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