| 摘要 |
PURPOSE:To reduce power consumption in electronic watch circuits by through- current by reducing the period when both channel transistors of CMOS transistors conduct simultaneously. CONSTITUTION:A gate capacitor C1 forms an integrating circuit with a resistance R1. A gate capacitor C2 also forms the integrating circuit with a resistance R2. This integrating circuit has a role of delaying the input signals being applied to the point B and point C with respect to the input signal being applied to the point A. This turns out that a transistor Tr1 becomes slower in the timing changing from non- conducting to conducting than Tr2 and Tr4 from Tr3. And by making the degree of delaying of the waveform (b) at the points B, C suitable with the integrating circuit with respect to the input signal waveform (a), through-current may be eliminated without simultaneous conducting of the four transistors Tr1, Tr2, Tr3, Tr4. |
