| 摘要 |
PURPOSE:To accurately specify a fault position in the case of testing a fault on a common bus. CONSTITUTION:Each of a CPU 11, a memory 12 and plural I/O parts 13 to 15 connected to the common bus 10 is provided with a test pattern generating circuit part 16, a test pattern receiving circuit part 17, a collated result informing circuit part 18, and a collated result collecting circuit part 19, and when the circuit part 16 in any one of the units 11 to 15 transmits a test pattern to the bus 10, the test pattern is collated by respective circuit parts 17 and collated results are transmitted from respective circuit parts 18 to the circuit parts 19 in the transmitted units and collected. Consequently a fault position on the common bus 10 can be directly detected. |
