| 摘要 |
PURPOSE: To provide the data sensing circuit of a bit line for not inviting the decline of a data sensing speed. CONSTITUTION: To the respective sensing nodes LA and LA bar of a PMOS sense amplifier 10 and an NMOS sense amplifier 12, capacitors 18 and 20 for capacitance adjustment are respectively connected. When capacitances CLA and CLAB to the sensing nodes LA and bar LA by an equalization and precharge circuit 16 and voltage supply transistors T7 and T8 are different, the precharge level of the sensing nodes LA and bar LA does not become a set level. Thus, there is the case that sensing time by the pair of sense amplifiers 10 and 12 become long, however, since the capacitance is adjusted and made equal at all times by connecting the capacitors 18 and 20, the precharge level is kept fixed. |
