| 摘要 |
PURPOSE: To provide a double scan circuit which can be easily turned into a VLSI. CONSTITUTION: This double scan circuit includes first and second data converters 202 and 203 which convert (n)-bit actual line data and n-bit interpolating line data into 2n-bit data, first and second RAM 204 and 205 which store the actual line data and the interpolating line data, memory control circuit 201 which generates the write/read control signals of the first and second RAM 204 and 205, and a write address and a read address at the read speed which is 2n times as high as the write speed, and provides it to the first and second RAM 204 and 205, and generates a mixing control signal for mixing the original line data and the interpolating line data stored in the first and second RAM 204 and 205 for double scanning, and multiplexer 206 which selects the 2n-bit actual or interpolating line data read from the first and second RAM 204 and 205 in response to the mixing control signal and an actual/interpolating line control signal, and outputs the data as the n-bit double scan data. |
