| 摘要 |
PURPOSE:To detect a state capable of simultaneously using both of an I/O terminal and the output terminal of another IC connected to the I/O terminal as output terminals or input terminals by generating a break signal to detect the state. CONSTITUTION:When an I/O terminal to be a target is outputted and set up to/in a break setting register 8, a comparator circuit 9 outputs a break request signal to an execution (break) control circuit 10 when the data of an I/O direction data register 3 corresponding to the set I/O terminal are set up to an output state. At the time of receiving the break request signal, the circuit 10 outputs a break signal to the target and a CPU 13 to stop the execution of a user memory 7. Consequently a state capable of simultaneously using the I/O terminal and the output terminal of another IC connected to the I/O terminal as output terminals can be detected. |
