| 摘要 |
PURPOSE:To form multiple pictures from images of different video signal standards. CONSTITUTION:A switch 18 selects video signals which are inputted and processed by input processing circuits 14 and 16, and a switch 20 selects synchronizing signals separated by the input processing circuits 14 and 16. The output of the switch 18 is impressed to an image memory 26 through an LPF 22 and an A/D converter 24. A reduction control circuit 34 outputs a horizontal and a vertical enable signal to a memory control circuit 36 at timing corresponding to the reduction rate (k) (0<=k<=1) from a CPU 38 on the basis of the synchronizing signal from the switch 20. The memory control circuit 36 controls writing to the image memory 26 according to the synchronizing signal from the switch 20 and the enable signal from the reduction control circuit 34 and controls the write address according to the storage coordinate information from a CPU 38. |
