发明名称 |
Semiconductor memory device having an automatically activated verify function capability |
摘要 |
A semiconductor memory device having a plurality of nonvolatile memory devices or elements disposed in a matrix arrangement as one or more memory arrays is provided with a write operation and a verify mode which is automatically implemented when the write operation of the memory device ends. In connection with this, an auto-verify function is set in an internal circuit associated with the memory in accordance with a predetermined control signal and wherein a read mode subsequent to the write operation is implemented. During the auto-verify function, the read mode is implemented by effecting a data comparison circuit, such as an exclusive-OR logic circuit, which performs a coincidence/non-coincidence operation comparing the write data and the read data.
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申请公布号 |
US5434819(A) |
申请公布日期 |
1995.07.18 |
申请号 |
US19940282313 |
申请日期 |
1994.07.29 |
申请人 |
HITACHI, LTD.;HITACHI VLSI ENGINEERING CORP. |
发明人 |
MATSUO, AKINORI;WATANABE, MASASHI;WADA MASASHI;WADA, TAKESHI;NAKAMURA, YASUHIRO |
分类号 |
G06F12/16;G11C16/02;G11C16/06;G11C16/10;G11C16/34;G11C17/00;G11C29/00;G11C29/02;G11C29/04;G11C29/12;G11C29/46;G11C29/48;H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):G11C7/00 |
主分类号 |
G06F12/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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