发明名称 Dynamic semiconductor memory device having sense amplifier with compensated offset voltage
摘要 A dynamic random access memory, which comprises a substrate, a dynamic memory cell located on the substrate, a pair of bit lines to read out data from the cell and/or write data to the cell, a plurality of word lines, connected to the bit lines, to select a desired memory cell, a differential sense amplifier having an output line, the differential sense amplifier amplifying data from the pair of bit lines and transferring the amplified data to the output lines; means for precharging a first bit line of the pair of bit lines to a reference voltage and a second bit line of the pair of bit lines to a second voltage exceeding the reference voltage by the amount of an input offset voltage of the sense amplifier.
申请公布号 US5434821(A) 申请公布日期 1995.07.18
申请号 US19920986908 申请日期 1992.12.08
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 WATANABE, YOHJI;NAKAMURA, NOBUO
分类号 G11C11/401;G11C7/12;G11C11/409;G11C11/4091;(IPC1-7):G11C7/00 主分类号 G11C11/401
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