发明名称 PHASE LOCKED LOOP CIRCUIT DEVICE AND ITS PHASE COMPARATOR
摘要 PURPOSE:To shorten phase locking time by supplying a bias voltage to the output terminal of a loop filter before an external clock signal is supplied, and preventing a charge pump circuit from being operated. CONSTITUTION:A bias voltage supply circuit B is provided at the output terminal of the loop filter 3, and when a voltage of low level is supplied to a switch signal 11 before the external clock signal 6 is inputted, voltages in which a power supply voltage is voltage-divided by the on-resistance of transistors(TR) 12, 13 are outputted, which charge the capacitance C of the loop filter 3 in a moment. Thereby, a control voltage added on the input terminal of a voltage controlled oscillation circuit 4 is increased, in a moment, and the oscillation frequency of the circuit 4 can also rise in a short time. After that, an operation is performed by supplying the external clock signal 6. Also, when the bias voltage is supplied, waste current pass can be eliminated by preventing the charge pump circuit 2 from being operated by the input of a control signal 6.
申请公布号 JPH07177027(A) 申请公布日期 1995.07.14
申请号 JP19930322755 申请日期 1993.12.21
申请人 MITSUBISHI ELECTRIC CORP 发明人 ISHII SUSUMU;ISHIBASHI ATSUHIKO
分类号 H03L7/089;H03L7/10 主分类号 H03L7/089
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