| 摘要 |
PURPOSE:To allow quick DC test for all output terminals by providing an urging terminal, a clock terminal, a pulse generating circuit, an EX-OR circuit, and a circuit for inputting a common pulse signal to every group of less than a predetermined number thereby simply controlling the signals to be applied to two terminals through a logic circuit. CONSTITUTION:The integrated circuit comprising a logic circuit 1 incorporating a user logic and I/O terminals 2, 3 thereof is further provided with a terminal 4 receiving an urging signal for DC test, a terminal 5 receiving a test clock signal for DC test, a circuit 6 for generating independent K pulse signals in time series in synchronism with the test clock signal at the time of urging the DC test, and an EX-OR circuit 7 inserted between the logic circuit 3 and each output terminal 3. A common pulse is inputted for every group of less than a predetermined number. |
