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发明名称
Système pour visualiser et étudier de façon concrète le fonctionnement logique et analogique d'un micro ordinateur à l'état de marche.
摘要
申请公布号
FR2706212(B1)
申请公布日期
1995.07.13
申请号
FR19930007101
申请日期
1993.06.07
申请人
ZABETI ESMAIL
发明人
ZABETI ESMAIL
分类号
G09B23/18;(IPC1-7):G09B23/00
主分类号
G09B23/18
代理机构
代理人
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