发明名称 FELT HAVING A DIELECTRICALLY ISOLATED GATE CONNECT
摘要 A HIGHFET having a gate with a pad which is isolated from the FET heterostructure wafer by a dielectric layer to minimize leakage current between the gate and the wafer. The method of production of this device involves application of the gate metal only over the active area of the FET and a photo resist covering on the gate metal. The wafer, including the area covered by the photo resist, is covered with the dielectric layer. The photo resist layer is removed along with the dielectric layer from over the gate metal. Another layer of gate metal is formed on the preexisting gate metal including a gate pad on part of the remaining dielectric layer.
申请公布号 WO9519044(A1) 申请公布日期 1995.07.13
申请号 WO1994US14977 申请日期 1994.12.29
申请人 HONEYWELL INC. 发明人 SWIRHUN, STANLEY, E.
分类号 H01L21/335;H01L21/76;H01L29/778 主分类号 H01L21/335
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