发明名称 MAKING METHOD OF VERTICAL MOS TRANSISTOR
摘要 integrating polysilicon (2) and a isolating film(3) in order on the silicon substrate(1) to shape the form of island by patterning; developing an epitaxial layer(4) selectively; removing the isolating film(3) by wet-etching; shaping a gate isolating film(5) and a poly silicon layer(6) in order; dry-etching the poly silicon layer(6) to form a side wall gate(6a); forming a field oxide film(9); forming a gate capping oxide film(10) surrounding the side wall gate(6a) by heat treatment; executing source/drain ion injection, vapor deposition of an isolating film, contact area opening and formation of metal electrodes.
申请公布号 KR950007396(B1) 申请公布日期 1995.07.10
申请号 KR19900012367 申请日期 1990.08.11
申请人 LG SEMICONDUCTOR CO., LTD. 发明人 JUNG, YONG - KWON
分类号 H01L29/78;(IPC1-7):H01L29/78 主分类号 H01L29/78
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