| 摘要 |
The method comprises a process for developing a GaAs active layer(1), a InGaAlP space layer(2), a N-InGaAlP electron supply layer(3), and n+-GaAs cap layer(4) in order, a process for forming a source electrode(5) and a drain electrode(6) on the n+-GaAs cap layer through a photo lithography and metal vapor deposition process, and a process for removing n+-GaAs cap layer between the source electrode and the drain electrode to form a gate electrode(7) on the N-InGaAlP layer through the vapor deposition.
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