| 摘要 |
A clock signal regeneration method and apparatus which improves the accuracy in rate of a regenerated clock signal is disclosed. A timing extraction circuit (1) extracts a timing signal (52) from received data (51). A phase comparator (2) compares the timing signal with a regenerated clock signal (50) in phase to produce a phase difference signal (53), which is cumulatively added by an integrator (4) in a cycle of a controlling clock signal (54) having a frequency higher than the timing signal. A sine wave regenerating ROM (5) converts the output of the integrator into amplitude information by which an amplitude of a sine waveform is represented in a digital value. A D/A converter (6) converts the information into an analog signal, which is compared with a reference voltage by a comparator (8) to produce a new regenerated clock signal. <IMAGE> |
