| 摘要 |
An improved edge termination scheme for semiconductor structures includes field-limiting rings (13, 14 and 15) having a fine-to-coarse incrementing scheme (18, 19 and 20) which is spatially additive assuring constancy against lateral junction variation. This spatially increasing scheme greatly enhances breakdown voltage characteristics. Additionally, redundant rings (14) are used to further guarantee insensitivity of the device to manufacturing variations. Reverse floating polysilicon flaps (29, 29 and 30) may be included to aid surface stability, when exposure to stray surface charges is anticipated. Additionally, this scheme provides for easy voltage scalability. <IMAGE> |
