| 摘要 |
A TTL/CMOS interface circuit having a tripping threshold unaffected by variations in temperature and supply voltage, comprises an input stage (Si), and an output stage (Su) which is an inverter. The input stage comprises a pair of inverters (M2,M3 and M5,M6) powered through a current mirror structure (M1,M4). The first of said inverters (M2,M3 and M5,M6) has an input terminal connected to a voltage reference (VREF) with the same value as the TTL switching threshold, and an output terminal connected to a control terminal (A) of the current mirror structure (M1,M4). The second inverter (M5,M6) has an input terminal (IN) forming the input terminal of the interface circuit and an output terminal connected to the output stage (Su). The interface circuit is supplied a voltage equal to the CMOS supply voltage. <IMAGE> |
