| 摘要 |
<p>PURPOSE: To further accelerate a burst mode in a synchronous random access memory unit provided with the burst mode. CONSTITUTION: When an external address XAi is inputted while being synchronized with system clock signals XK, a counter control circuit 800 outputs counter reset signals KCOUNT0 and counter enable signals KCOUNT1 successively. A counter 700 is reset corresponding to the signals KCOUNT0, then an operation is performed for one time corresponding to the signals KCOUNT1 and a burst address is set. Then, when the burst mode is started, since the burst address is already set for one time, burst enable signals KBURSTB are immediately enabled. Conventionally, since the counter is reset and the burst address of a first time is set after the burst mode is started, it is required to delay the signals KBURSTB for the time for that, however, the need of the time is eliminated in this invention and the burst mode is quickly executed.</p> |
