| 摘要 |
PURPOSE:To suppress increase of number of gates installed in LSI and also reduce delay of ordinary external output signals of LSI even if the number of output signals is increased in the LSI of which internal logic test and soldering failure test are made internally. CONSTITUTION:An internal logic and soldering test circuits 33 are provided in an LSI 31. Ordinary external output signals B from the internal logic circuit 32 are supplied directly to the external output terminal OUTB of the LSI 31. Also signals to be tested A from the internal logic circuit 32 are outputted to a logic circuit 34 for internal logic test. Then the input and output terminals of the LSI 31 are grouped into G1 and G2, and connected to logic circuits for soldering test 35 and 36, respectively. Thus the outputs from the logic circuits are bundled by one output logic circuit 37, and outputted from an output terminal OUTA. |
