| 摘要 |
<p>PURPOSE:To shorten a write recovery time before reading at the time of verifying a program by outputting program verifying voltage at a prescribed time point. CONSTITUTION:When a program command is latched, an internal signal outputted by a command decoder 13 is supplied, and a verifying voltage generating circuit section 11b generates verifying voltage through a control circuit section 11a of a verifying voltage generating cirucit 11A. After that, when a program verifying command is latched, the circuit section 11b is controlled by the circuit 11a in accordance with an internal signal from the decoder 13, program verifying voltage is outputted to a X decoder 4 from the circuit 11A to be applied. Therefore, a write recovery time before reading at the time of verifying a program is shortened comparing with the case where program verifying voltage is generated and outputted after a program verifying command is latched.</p> |
