| 摘要 |
<p>PURPOSE:To synchronize plural data recorders with the accuracy of data unit and clock unit. CONSTITUTION:Clock circuits 31 and 41 of clock unit are driven by being synchronized with clock data inserted into a data signal reproduced by data recorders 1 and 2. This clock data is latched by latching circuits 32 and 42, supplied to a time difference detecting circuit 33 and the detected value is supplied to a control circuit 34. Also, a synchronizing signal generated by a synchronization generating circuit 36 is supplied to the data recorder 1. Further, a command from the control circuit 36 is supplied to a control circuit 43. A synchronizing signal from the synchronization generating circuit 36 is supplied to a delay circuit 44 and the delay amount controlled by a signal from the control circuit 43. Then, a synchronizing signal from the delay circuit 44 is supplied to the data recorder 2.</p> |
