发明名称 Method and apparatus for a unified parallel processing architecture
摘要 A unified parallel processing architecture connects together an extendible number of clusters of multiple numbers of processors to create a high performance parallel processing computer system. Multiple processors are grouped together into four or more physically separable clusters, each cluster having a common cluster shared memory that is symmetrically accessible by all of the processors in that cluster; however, only some of the clusters are adjacently interconnected. Clusters are adjacently interconnected to form a floating shared memory if certain memory access conditions relating to relative memory latency and relative data locality can create an effective shared memory parallel programming environment. A shared memory model can be used with programs that can be executed in the cluster shared memory of a single cluster, or in the floating shared memory that is defined across an extended shared memory space comprised of the cluster shared memories of any set of adjacently interconnected clusters. A distributed memory model can be used with any programs that are to be executed in the cluster shared memories of any non-adjacently interconnected clusters. The adjacent interconnection of multiple clusters of processors to a create a floating shared memory effectively combines all three type of memory models, pure shared memory, extended shared memory and distributed shared memory, into a unified parallel processing architecture.
申请公布号 US5428803(A) 申请公布日期 1995.06.27
申请号 US19920912964 申请日期 1992.07.10
申请人 CRAY RESEARCH, INC. 发明人 CHEN, STEVE S.;BEARD, DOUGLAS R.;SPIX, GEORGE A.;PRIEST, EDWARD C.;WASTLICK, JOHN M.;VANDYKE, JAMES M.
分类号 G06F9/38;G06F1/10;G06F12/06;G06F13/16;G06F15/173;(IPC1-7):G06F3/60 主分类号 G06F9/38
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