| 摘要 |
An integrated circuit device comprises a memory cell array, a core section, a decoder section, and an input and output section. The memory cell array is composed of a plurality of memory cells and data are transmitted and received between the memory cells and corresponding column lines. The core section has a plurality of data lines. Data is transmitted and received between the data lines and the column lines. Any given number of the column select lines are activated simultaneously for conduction between the column line and the data line. The decoder section includes a plurality of column decoders for activating any given number of the column select lines simultaneously. The input and output section transmits and receives data between the data lines and the outside. The basic operations of a SDRAM (synchronous DRAM) such as serial access and wrap access can be realized simply.
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