| 摘要 |
PURPOSE: To reduce noise induced clue to the quantization of an AC signal or the like by selecting and sampling the frequency of a dither current based on the band width of an analog signal and converting the sampled signal into a digital signal. CONSTITUTION: The Σ/Δ analog/digital converter(ADC) 10 converts an analog signal inputted to an input 24 into a digital signal and outputs the digital signal from an output 26. A dither current circuit 20 provided with a multi-level dither current generator 30 and a clock 38 applies a dither current to the inverted input of an amplifier 28 in an integrating circuit 12, which removes the high frequency component of an error signal to hold an error signal in the band of a signal designed so that the ADC 10 executes suitable conversion. A comparator 14 compares an output from the circuit 12 with a reference level, a counter 16 counts the signal based on the status of the comparator 14 and a decimeter 18 samples the digital output of the counter 16 at the speed of twice the maximum frequency of the signal monitored by the input 24.
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