| 摘要 |
PURPOSE: To improve the degree of integration and to prevent the occurrence of excessive erasure by forming an EEPROM of a contactless virtual ground cell as a split gate structure. CONSTITUTION: A field oxide film 11 for preventing the occurrence of punch through between cells of a cell array is formed as island shape at a specified part of the array. A specified photoresist pattern 12 is ion-implanted as a mask to form an imbedded n<+> -bit line 13 in the region between adjoining field oxide film islands 11. After an oxide film 14 has been selectively formed only on the imbedded n<+> -bit line 13, a first gate oxide film 15 is formed at a specified part in a channel region. After a conductive layer has been formed over the entire surface, patterning is performed, and a floating gate line 16 is formed on the upper part of the first gate insulating film 15 in the channel region and at a part of the oxide film 14 on the embedded bet line 13. Thus a split gate structure is obtained for preventing the occurrence of excessive erasure. |
