发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To increase the pitch of word lines without changing the selection system of a cell as compared with that in conventional cases by a method wherein a word line and a plate electrode which are owned jointly by two cells which are adjacent in a direction in which the bit line is run are formed so as to be deviated in a direction in which the bit line is run. CONSTITUTION:For example, memory cells Cn,n, Cn+1 which are connected to one bit line BL41 are laid out in such a way that they are connected to one word line WLn. On the other hand, plate electrodes PLn, PLn+1 are laid out in such a way that they are deviated by a half pitch with reference to the word line WLn, and the two cells Cn,n Cn,n+1 which are connected to one bit line WL and one bit line WL41, are connected to other electrodes. Thereby, the two memory cells are connected to every word line and every bit line, the plate electrode is made inactive in the cell from which data is to be read out, and, before the word lines are selected, the plate electrode is set to an active state in the cell from which data is not to be read out. Consequently, the pitch of the word lines ca be increased.
申请公布号 JPH07161831(A) 申请公布日期 1995.06.23
申请号 JP19930306722 申请日期 1993.12.07
申请人 TOSHIBA CORP 发明人 WATANABE SHIGEYOSHI
分类号 H01L27/10;H01L21/8242;H01L27/108 主分类号 H01L27/10
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