EFFICIENT ROUTING METHOD AND RESULTING STRUCTURE FOR INTEGRATED CIRCUITS

摘要

A method and resulting structure for fabricating interconnects through an integrated circuit. The method includes adding more power lines (80, 100, 151 (100)) and/or increasing the width of power lines (120) and/or adding power lines (140) near regions of high current flow. The resulting structure also provides more metallization near regions of high current flow. Similar to the method, the resulting structure may include additional power lines (80, 100, 151 (100)) and/or wider power lines (120) and/or a power bus (140) to increase the amount of metallization. An improved routing technique is also provided. Such routing technique includes providing an initial Ucs value and then adding additional lines near high current regions to decrease the Ucs value.