| 摘要 |
A structure and a method provide a programmable logic device (200) including a number of generic logic blocks (203a-203l) or more application-specific block (203b). Such application-specific block implements a specific function, such as a register file or a memory array (420). In one embodiment, the application-specific block is programmable to be either one or more single-port memory array, a first-in-first-out (FIFO) memory, or a dual port memory array. In another embodiment, the application-specific block can be configured to be a register file, a number of counters, a number of timers, or a shift register. The application-specific block can be used in conjunction with programmable logic arrays for multiplexing input and output signals into and out of the application-specific block. Interconnectivity between the generic logic blocks and the application-specific blocks, using a global routing resource, integrates into a programmable logic device, functions otherwise difficult to implement using only generic logic blocks.
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