| 摘要 |
PCT No. PCT/JP92/01034 Sec. 371 Date Apr. 9, 1993 Sec. 102(e) Date Apr. 9, 1993 PCT Filed Aug. 13, 1992.In a buffer storage control system for controlling a buffer storage for a store-through method based on a part of a page address of a logical address and a part of a byte index of the logical address used as a line address, the system includes: a buffer storage DATA for holding data and a tag portion TAG1 provided in a central processing unit CPU to retrieve a hit/mis-hit of data based on a part of the page address of the logical address and a part of the byte address of the logical address as a basic line address, and a tag portion TAG2 provided in a main control unit MCU to retrieve the hit/mis-hit of data by using a synonymic line address which is obtained by changing a variable portion of the basic line address. In a fetch access, the tag portion TAG1 is retrieved by using the basic line address and when the data is hit, the data is transferred from the buffer storage DATA to a source of the fetch access request. When the data is mis-hit, the tag TAG 2 is retrieved by using the synonymic line address. When the data is hit by tag TAG 2, the tag portion TAG 1 is invalidated. When the data is mis-hit by tag TAG 2, the fetch data is moved from the main storage unit MSU to the buffer storage DATA, and transferred to the source of the fetch access request.
|
