| 摘要 |
Each of even series outputs of a CCD is clamped by a third capacitor and a fifth transistor in a high precise mode of a reader. Each of odd series outputs of the CCD is clamped by a first capacitor and a second transistor. The clamped odd and even series outputs are converted to digital signals by a first AD converter. In a high speed mode of the reader, odd series outputs of the CCD are clamped in a unit of one line period by first and second capacitors and the second transistor. In the high speed mode, even series outputs of the CCD are clamped in the unit of one line period by third and fourth capacitors and a fifth transistor. The clamped odd and even series outputs are respectively converted to digital signals by individual first and second AD converters. In this reader, the high precise mode or the high speed mode can be selected in accordance with necessity.
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