发明名称 MEMORY SYSTEM
摘要 PURPOSE:To prevent the whole process from being delayed even when a write time becomes long by compressing and writing data in an EEPROM by a sub- CPU provided separately from a main CPU which writes data in a RAM. CONSTITUTION:The main CPU 1, the RAM 3, the EEPROM 4, and a ROM 5, and the sub-CPU 6 are connected respectively through a bus 2. Further, the main CPU 1 and sub-CPU 6 are connected through a bus 7 and a communication line 8. When the main CPU 1 rewrites data in the RAM 3, that is reported to the sub-CPU 6 through the communication line 8. Consequently, the sub-CPU 6 compresses the data in the RAM 3 and stores them in the EEPROM 4 according to a data compressing program stored in the ROM 5. In this case, the recording contents of the RAM 3 are read out and used as data to be recorded in the EEPROM 4. Therefore, even if the writing time of the EEPROM 4 is long, the main CPU 1 can be dedicated to its original process and the whole operation is not hindered.
申请公布号 JPH07152656(A) 申请公布日期 1995.06.16
申请号 JP19930320857 申请日期 1993.11.29
申请人 NEC CORP 发明人 OGAMI CHOJI
分类号 G06F12/16 主分类号 G06F12/16
代理机构 代理人
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