发明名称 DIGITAL PHASE-LOCKED LOOP FILTER
摘要 PURPOSE: To provide a digital PLL filter the filter coefficient (K) of which is periodically decremented between an initial value and a target value at every clock pulse. CONSTITUTION: A digital PLL filter performs multiplication at least one time by using filter coefficients K1 and K2 before the PLL filter outputs filtered signals by digitally processing incoming error signals θe at every clock pulse. The PLL filter incorporates a correcting means which incrementally corrects the values of the filter coefficients at every clock pulse during the initial operating period of the PLL filter.
申请公布号 JPH07154247(A) 申请公布日期 1995.06.16
申请号 JP19940204048 申请日期 1994.08.30
申请人 SGS THOMSON MICROELECTRON SA 发明人 UIRIAMU GURASU
分类号 H03L7/06;H03H17/02;H03L7/093;H03L7/107 主分类号 H03L7/06
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