RANDOM BLOCK ACCESS CONTROL CIRCUIT FOR DIGITAL IMAGE PROCESSING SYSTEM

摘要

The controller takes the continuous input and output that it is available to access the memory cell array with a block unit. The controller comprises; a RBA detector searching the read/write signal by a falling edge unit (11); a read/write signal detector unit (13) outputting the read/write signal; a block size detectors (15,25) detecting the block size by output signal from the X-Y controller; a second 2Y controller (24) storing the memory data of the second latch.