Dynamically programmable timer-counter.

摘要

A programmable timer circuit is comprised of a programmable timer counter (622) for receiving a count and for counting to the count. A clock signal drives the timer counter which generates a signal representative of the count. A microprocessor generates count data in response to programming of the microprocessor. A timer data register (600) receive the count from microprocessor. A first gate (620) is provided having an enabled mode and an non-enabled mode for enabling loading of the timer data from the timer data register (600) to the timer counter input only in the enabled mode. A monitoring circuit (630, 632, 642) is provided for monitoring the timer count and enabling the gate mean (620) to the enabled mode only when the timer has timed-out. <IMAGE>