发明名称 Semiconductor memory device having redundant memory cells and circuit therefor
摘要 The semiconductor memory device includes at least one pair of redundant digit lines (RD,RDb), first input/output lines (IO,IOb) connected to a pair of digit lines (D,Db) via a respective sense amplifier (SA) and a switch (SW), second input/output lines (IO',IOb')connected to the redundant digit line pair (RD,RDb) via a sense amplifier (RSA) and switch (RSW), and selective amplifier means (IOSW, IOSW', RIOSW, RIOSW') for amplifying second input/output lines when redundant digit lines are selected. With this configuration, even when the redundant digit line pair is substituted for the digit line pair, it is possible to execute the redundancy operation by mere translation between these input/output line pairs.
申请公布号 US5424987(A) 申请公布日期 1995.06.13
申请号 US19930128237 申请日期 1993.09.29
申请人 NEC CORPORATION 发明人 MATSUI, YOSHINORI
分类号 G11C11/401;G11C11/409;G11C16/06;G11C17/00;G11C29/00;G11C29/04;G11C29/34;(IPC1-7):G11C7/00 主分类号 G11C11/401
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