Semiconductor memory system for monitoring a signal output, synchronization with data output from a memory device and indicating that the output data are valid, by using a CPU

摘要

A semiconductor memory system has a central processing unit (CPU) for supplying an address signal to any one of a plurality of memories for storing data and processing data read out from an address corresponding to the address signal. The memory outputs data addressed in response to an address signal from the central processing unit. The system further comprises a circuit for generating a STAT signal representing that the output data is valid. The STAT signal is output in synchronization with the output data, and monitored by the central processing unit, thereby controlling a cycle of operations for reading data from the plurality of memories.