发明名称 INPUT-OUTPUT TERMINAL CELL FOR SEMICONDUCTOR INTEGRATED CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To provide an output terminal cell for semiconductor integrated circuits which can easily improve the observability of the internal logic circuit and fault detecting rate of a semiconductor integrated circuit device independently from the state of the internal logic circuit by increasing the number of terminals by a few. CONSTITUTION:An input-output terminal cell for semiconductor integrated circuits is provided with two data terminals Dn1 and Dn2, a clock terminal CK, and flip flops 2 and 4 which fetch the data from the terminals Dn1 and Dn2 at the clock of the clock terminal CK. The terminal cell is also provided with the output terminals Qn1 and Qn2 of the flip flops 2 and 4, a decoding means 6 which decodes the outputs of the flip flops 2 and 4, selecting means 8 which selects one signal out of a maximum of four signals by using the output from the means 6 as a control signal, and an output buffer 10 which drives the signal selected by the means 8 to the outside.
申请公布号 JPH07146338(A) 申请公布日期 1995.06.06
申请号 JP19930291747 申请日期 1993.11.22
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 YAMAGUCHI SEIJI;YAMAMOTO TAKAO
分类号 G01R31/28;G06F11/22;H01L21/66 主分类号 G01R31/28
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