| 摘要 |
1,273,181. Capacitor storage circuits; capacitor chain delay circuits. PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd. 22 April, 1969 [23 April, 1968], No. 20475/69. Heading H3T and H3U. [Also in Divisions G4 and H1] A change is transferred to a capacitor C 1 connected between drain and gate of a field effect transistor from a capacitor C 0 connected between source and drain by a switching voltage source connected between the gate and the adjacent electrode of capacitor C 0 . The figure shows a binary shift register or an analogue delay line operable as a filter. During the first negative half cycle of a pulse source So current flows from an input signal source V i through a selective large resistor R 0 to correspondingly discharge a capacitor C 0 . During the next positive cycle current flows through T 1 to restore the charge on C 0 to a value equal to the voltage So less the threshold voltage of the transistor and this charge is withdrawn from an equal capacitor C 1 . During the next negative half cycle, C 0 is again discharged to the level of the signal and the charge on C 1 is transferred to C 2 . In this manner the charge is transferred progressively along the chain of capacitors. Multiphase switching may replace the two-phase shown in which case the capacitors are connected to the phases in groups. An integrated arrangement is described in which the capacitors are the enhanced gatesource capacitance of the transistors. |
