| 摘要 |
PURPOSE:To confirm the adequacy of memory request control by confirming the limit value of the optimum number of memory requests without a channel device and an input/output device. CONSTITUTION:A dummy request sending-out circuit 30 sends out a dummy memory request valid signal and dummy request data. An AND gates 34 inhibits a memory reply valid signal from being outputted from a reply synchronizing circuit 18 to a reply transmitting circuit 22 according to the output of a dummy request FF 31. An AND gate 35 inhibits a dummy memory request valid signal from being outputted from a dummy sending-out circuit 30 to a selector 32 according to the memory request inhibition signal from a comparing circuit 28. An OR gates 36 outputs a memory request inhibition signal to respective channel devices according to the output of a dummy request FF 31. |
