发明名称 ACTIVE MEMORY AND PROCESSING SYSTEM
摘要 <p>PURPOSE: To provide an active memory equipped with a data memory having the rows and columns of storage positions for holding data and the calculated results. CONSTITUTION: A broadcast memory 22 is provided with the rows and columns of storage positions for holding control instructions. A calculation circuit 26 is provided for executing 1st arithmetic while using 1st and 2nd data words retrieved from a data memory 20 and for executing 2nd arithmetic while using the 1st arithmetic result and the preceding arithmetic result. In response to the control instruction received from the broadcast memory 22, a control circuit 24 is operated for controlling the transfer of 1st and 2nd data words from the data memory 20 to the calculation circuit 26 and the execution of 1st and 2nd arithmetic.</p>
申请公布号 JPH07141175(A) 申请公布日期 1995.06.02
申请号 JP19940115229 申请日期 1994.05.27
申请人 TEXAS INSTR INC <TI> 发明人 JIYOOJI AARU DODEINTON;BASABARUJI PAWATE;SHIBARINGU MAHANTO SHIETSUTEI;DERETSUKU SUMISU
分类号 G06F12/08;G06F9/38;G06F15/78;G06F17/10;G06F17/16;G11C11/401;(IPC1-7):G06F9/38 主分类号 G06F12/08
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