| 摘要 |
PURPOSE:To provide an equalizer circuit and a precharge circuit capable of cutting down the equalizing time and the precharging time without decreasing the yield at all. CONSTITUTION:Mutually adjacent specific pair of word lines are assumed as dummy word lines DWL1, DWL2 while accumulated nodes N1, N2 are short- circuited with each other between a pair of dummy memory cells 11n, 12n connected to said pair of dummy word lines DWLI, DWL2 furthermore, the accumulated nodes N1, N2 in respective pair of memory cells 111 121 are short-circuited with cell plates 25 so as to constitute an equalizing circuit and a precharging circuit using the same memory cell as an equalizing and precharging transistor. |
