| 摘要 |
<p>PURPOSE:To quickly and stably suppress the jitter due to the byte stuff of the reception signal in an SDH communication system. CONSTITUTION:An SDH frame demap circuit 1 outputs a TU (tributary) signal 102, and a VC(virtual container) signal 201 and a byte stuff signal 201 are outputted from a P/N byte stuff detection circuit 2. A bit stuff detection circuit 3 outputs a C signal (data) 301 and a C clock (writing clock) 302. A phase comparison circuit receives the C clock 302 and the R clock 602 (reading clock) that a phase control oscillator 6 outputs via a memory 4, outputs a phase control signal 601 so as to predict the phase difference between two clocks based on the fluctuation prediction by the byte stuff signal 201 to converge the difference within a stable area in a bit unit and suppresses the jitter of R (reading) data 401.</p> |
