| 摘要 |
PURPOSE:To provide a multiplier laid out to repeatedly execute multiplication without using an external bus wiring causing the increment of an occupied area. CONSTITUTION:An operation part 10 for executing the multiplication of a multiplier consisting of optional M bits stored in a 1st register 1 and a multiplicand consisting of optional N bits stored in a 2nd register 2 in accordance with booth's algorithm and a 3rd register 3 for storing the operation result of the operation part 10 are arranged on the surface of a substrate and the 3rd register 3 is arranged between the operation part 10 and the 2nd register 2. The 2nd register 2 is arranged between the 3rd register 3 and a RAM 7 to be a 4th register and operation results are applied from the 3rd register 3 directly to the 2nd register 2 or repeatedly applied to the 2nd register 2 through the 4th register 7 as multiplicands to repeat multiplication. Since the 2nd and 3rd registers are adjacently arranged, a wiring L0 for repeatedly applying multiplicands to the 2nd register 2 can be shortened. |
