发明名称 Delay circuit using capacitor and transistor.
摘要 A delay circuit comprising at least one capacitor (209,210) with one electrode thereof is connected to a fixed potential (GND), a signal transmission line (212), and at least one switch means (205,208;211,206,207) between the other electrode of the capacitor and the signal transmission line (212). The switch means makes electrical connection or disconnection between the capacitor and the signal transmission line (212) in accordance with an actual supply voltage (Vdd) value. <IMAGE>
申请公布号 EP0655834(A1) 申请公布日期 1995.05.31
申请号 EP19940118042 申请日期 1994.11.15
申请人 NEC CORPORATION 发明人 FURUCHI, MASAKI, C/O NEC CORPORATION;HIRAI, MASAHIKO, C/O NEC CORPORATION
分类号 H03H11/26;H03K5/13;H03K5/151 主分类号 H03H11/26
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